Module d1_pac::i2s_pcm::i2s_pcm_clkd

I2S/PCM Clock Divide Register

Structs

• I2S_PCM_CLKD_SPEC
  I2S/PCM Clock Divide Register
• R
  Register i2s_pcm_clkd reader
• W
  Register i2s_pcm_clkd writer

Enums

• BCLKDIV_A
  BCLK Divide ratio from PLL_AUDIO
• MCLKDIV_A
  MCLK Divide ratio from PLL_AUDIO
• MCLKO_EN_A
  MCLK Output Enable

Type Aliases

• BCLKDIV_R
  Field bclkdiv reader - BCLK Divide ratio from PLL_AUDIO
• BCLKDIV_W
  Field bclkdiv writer - BCLK Divide ratio from PLL_AUDIO
• MCLKDIV_R
  Field mclkdiv reader - MCLK Divide ratio from PLL_AUDIO
• MCLKDIV_W
  Field mclkdiv writer - MCLK Divide ratio from PLL_AUDIO
• MCLKO_EN_R
  Field mclko_en reader - MCLK Output Enable
• MCLKO_EN_W
  Field mclko_en writer - MCLK Output Enable