Expand description
DCXO Control Register
Structs§
- DCXO Control Register
- Register
dcxo_ctrlreader - Register
dcxo_ctrlwriter
Enums§
- The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M.
- Clock REQ enable
- DCXO enable
- Xtal mode enable signal, active high
Type Aliases§
- Field
clk16m_rc_enreader - The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M. - Field
clk16m_rc_enwriter - The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M. - Field
clk_req_enbreader - Clock REQ enable - Field
clk_req_enbwriter - Clock REQ enable - Field
dcxo_bgreader - DCXO bandgap output voltage - Field
dcxo_bgwriter - DCXO bandgap output voltage - Field
dcxo_enreader - DCXO enable - Field
dcxo_enwriter - DCXO enable - Field
dcxo_ictrlreader - DCXO current control value - Field
dcxo_ictrlwriter - DCXO current control value - Field
dcxo_ldo_inrushbreader - DCXO LDO driving capacity signal, active high - Field
dcxo_ldo_inrushbwriter - DCXO LDO driving capacity signal, active high - Field
dcxo_rfclk_enhancereader - DCXO rfclk enhance - Field
dcxo_rfclk_enhancewriter - DCXO rfclk enhance - Field
dcxo_trimreader - DCXO cap array value - Field
dcxo_trimwriter - DCXO cap array value - Field
rsto_dly_selreader - For Debug Use Only. - Field
rsto_dly_selwriter - For Debug Use Only. - Field
xtal_modereader - Xtal mode enable signal, active high - Field
xtal_modewriter - Xtal mode enable signal, active high