Module d1_pac::tcon_lcd0::lcd_cpu_tri3

LCD CPU Panel Trigger Register3

Structs

• LCD_CPU_TRI3_SPEC
  LCD CPU Panel Trigger Register3
• R
  Register lcd_cpu_tri3 reader
• W
  Register lcd_cpu_tri3 writer

Enums

• TRI_INT_MODE_A
  When set as 01, the Tri_Counter_Int occurs in cycle of (Count_N+1) * (Count_M+1) * 4 dclk.

Type Aliases

• COUNTER_M_R
  Field counter_m reader - The value of counter factor
• COUNTER_M_W
  Field counter_m writer - The value of counter factor
• COUNTER_N_R
  Field counter_n reader - The value of counter factor
• COUNTER_N_W
  Field counter_n writer - The value of counter factor
• TRI_INT_MODE_R
  Field tri_int_mode reader - When set as 01, the Tri_Counter_Int occurs in cycle of (Count_N+1) * (Count_M+1) * 4 dclk.
• TRI_INT_MODE_W
  Field tri_int_mode writer - When set as 01, the Tri_Counter_Int occurs in cycle of (Count_N+1) * (Count_M+1) * 4 dclk.