Module d1_pac::uart::fcc

UART FIFO Clock Control Register

Structs

• FCC_SPEC
  UART FIFO Clock Control Register
• R
  Register fcc reader
• W
  Register fcc writer

Enums

• RX_FIFO_CLOCK_ENABLE_A
  Value on reset: 0
• RX_FIFO_CLOCK_MODE_A
  Value on reset: 0
• TX_FIFO_CLOCK_ENABLE_A
  Value on reset: 0

Type Aliases

• FIFO_DEPTH_R
  Field fifo_depth reader -
• RX_FIFO_CLOCK_ENABLE_R
  Field rx_fifo_clock_enable reader -
• RX_FIFO_CLOCK_ENABLE_W
  Field rx_fifo_clock_enable writer -
• RX_FIFO_CLOCK_MODE_R
  Field rx_fifo_clock_mode reader -
• RX_FIFO_CLOCK_MODE_W
  Field rx_fifo_clock_mode writer -
• TX_FIFO_CLOCK_ENABLE_R
  Field tx_fifo_clock_enable reader -
• TX_FIFO_CLOCK_ENABLE_W
  Field tx_fifo_clock_enable writer -